The patented ElectroCell technology has been shown to plate copper features rapidly with greater copper uniformity than achieved with the standard plating cell geometries used throughout the industry today.
Dr. Craig Davidson, Viasystems’ VP of Engineering and Technology, stated: “Improved thickness uniformity across the PCB translates to improved capability to fabricate complex features with higher quality and reliability as compared to baseline processes. It also provides productivity improvements, which reduce costs.”
This work exemplifies Viasystems’ commitment to customer satisfaction through advancements in manufacturing technology that increase capability, improve quality and lower the costs of PCBs manufactured by Viasystems.
The FARADAYIC ElectroCell technology is a drop-in technology, anticipated to streamline implementation and reduce costs traditionally associated with incorporation of new technology into existing manufacturing lines.
Dr. E. Jennings Taylor, Faraday’s founder and VP, said, “The tank design, including all tank components, is a drop-in replacement meant to cost-effectively address the continuing miniaturization and sophistication of PCBs for current and next-generation electronic modules.”
Funding for this work was provided in part by the United States National Science Foundation through the competitive SBIR program with the goal of advancing and strengthening the United States’ manufacturing sector.
FARADAYIC ElectroCell: US Patent Number 7,553,401 (6-30-09), pending Divisional Patent, application number 12/431,030 (filed 4-28-09) and pending Continuation-In-Part, application number 11/836,903 (filed 8-10-07).
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